From ddf01d51c3429c25a57077d93d3309ce0e5d2262 Mon Sep 17 00:00:00 2001 From: Nathan Ringo Date: Tue, 8 Oct 2024 21:33:12 -0500 Subject: Preparation to start using separate clock domains. --- fpga/src/Top.bs | 4 ---- 1 file changed, 4 deletions(-) (limited to 'fpga/src/Top.bs') diff --git a/fpga/src/Top.bs b/fpga/src/Top.bs index df79387..67449bd 100644 --- a/fpga/src/Top.bs +++ b/fpga/src/Top.bs @@ -1,12 +1,8 @@ -- | The top-level module, for the iCEBreaker. package Top where -import Connectable -import CPU -import GetPut import Numini import TriState -import Uart -- | The interface to the iCEBreaker. interface Top = -- cgit v1.2.3