-- | The top-level module for simulation.
package TopSim where

import Connectable
import CPU
import GetPut
import TriState
import Uart

mkTopSim :: Module Empty
mkTopSim =
  module
    cpu <- mkCPU

    uart <- mkUart 1
    mkConnection cpu.uart_tx uart.send
    mkConnection cpu.uart_rx uart.recv

    fakeUart <- mkUart 1
    rules
      when True ==> uart.rxPin fakeUart.txPin

    timer :: Reg (Bit 8) <- mkReg 0
    rules
      when True ==> timer := timer + 1
      when (timer == 0x00) ==> fakeUart.send.put 0x30
      when (timer == 0x01) ==> fakeUart.send.put 0x30
      when (timer == 0x02) ==> fakeUart.send.put 0x77
      when (timer == 0x03) ==> fakeUart.send.put 0x31
      when (timer == 0x04) ==> fakeUart.send.put 0x32
      when (timer == 0x05) ==> fakeUart.send.put 0x33
      when (timer == 0x06) ==> fakeUart.send.put 0x34
      when (timer == 0x10) ==> fakeUart.send.put 0x30
      when (timer == 0x11) ==> fakeUart.send.put 0x30
      when (timer == 0x12) ==> fakeUart.send.put 0x72
      when (timer == 0xff) ==> $finish

-- vim: set ft=haskell :