-- | The top-level module for simulation.
package TopSim where

-- import Numini

import GetPut
import I2C

mkTopSim :: Module Empty
mkTopSim = module
  {-
  ch559_uart_rx <- mkWire
  inkplate_uart_rx <- mkWire
  usb_uart_rx <- mkWire
  hyperbus_rwds_in <- mkWire
  hyperbus_dq_in <- mkWire
  i2c_scl_in <- mkWire
  i2c_sda_in <- mkWire
  numini <- mkNumini ch559_uart_rx inkplate_uart_rx usb_uart_rx
    hyperbus_rwds_in hyperbus_dq_in i2c_scl_in i2c_sda_in
  -}

  txSCL <- mkReg 0
  txSDA <- mkReg 0
  rxSCL <- mkReg 1
  rxSDA <- mkReg 1
  i2c <- mkI2C rxSCL rxSDA
  rules
    when True ==> txSCL := i2c.txSCL
    when True ==> txSDA := i2c.txSDA

  timer :: Reg (Bit 16) <- mkReg 0
  rules
    "t0000": when (timer == 0x0000) ==> do
      i2c.addrReg := 0x20 ++ (1 :: Bit 1)
      i2c.dataReg := 0x00
    "t0001": when (timer == 0x0001) ==> do
      i2c.statusReg := i2c.statusReg { ready = False; dataAckBit = True }
    "t0022": when (timer == 0x0023) ==> rxSDA := 0
    "t0025": when (timer == 0x0027) ==> rxSDA := 1
    "t0049": when (timer == 0x0049) ==> do
      i2c.addrReg := 0x20 ++ (0 :: Bit 1)
      i2c.dataReg := 0x00
    "t004a": when (timer == 0x004a) ==> do
      i2c.statusReg := i2c.statusReg { ready = False }
    "advance timer": when True ==> timer := timer + 1
    "finish": when (timer == 0x00ff) ==> $finish
    {-
    "log received values": when True ==> do
      result <- i2c.recv.get
      $display "recv: " (fshow result)
    -}

-- vim: set ft=haskell :