From f36676cda57e0228d76ef9b9c798b1e1d1d0e5e6 Mon Sep 17 00:00:00 2001
From: Nathan Ringo <nathan@remexre.com>
Date: Sun, 25 Feb 2024 02:26:14 -0600
Subject: [boards/qemu-virt] Adds a strict flush routine.

This writes to the UART, ignoring any notion of readiness. This will
probably need to be reworked once a real UART driver exists that is used
by this platform.
---
 boards/qemu-virt/qemu-virt.s | 32 ++++++++++++++++++++++++++++++--
 1 file changed, 30 insertions(+), 2 deletions(-)

(limited to 'boards/qemu-virt')

diff --git a/boards/qemu-virt/qemu-virt.s b/boards/qemu-virt/qemu-virt.s
index 4628564..a2618d2 100644
--- a/boards/qemu-virt/qemu-virt.s
+++ b/boards/qemu-virt/qemu-virt.s
@@ -1,26 +1,54 @@
 .section .text.start
 
 .extern main
+.extern CONSOLE_STRICT_FLUSH
 
 .global _start
+.type _start, STT_FUNC
 _start:
 	# Have harts other than 0 spin until hart0 wakes them up.
 	csrr a0, mhartid
 	c.bnez a0, wait_for_hart0
 
+	# Set up console_strict_flush.
+	la t0, console_strict_flush
+	la t1, CONSOLE_STRICT_FLUSH
+	sd t0, (t1)
+
 	# Set up hart0's stack.
 	la sp, hart0_initial_stack_top
 
 	# Call hart0_boot with the address of the DeviceTree.
-	c.mv a1, a0
+	c.mv a0, a1
 	call hart0_boot
-
 	# Fall through to a spin loop.
+.size _start, . - _start
+
+.type halt, STT_FUNC
 halt:
 	j halt
+.size halt, . - halt
+
+.section .text
+
+.type console_strict_flush, STT_FUNC
+console_strict_flush:
+	li t0, 0x10000000
+1:
+	c.beqz a1, 2f
+	lb t1, (a0)
+	sb t1, (t0)
+	addi a0, a0, 1
+	addi a1, a1, -1
+	j 1b
+2:
+	ret
+.size console_strict_flush, . - console_strict_flush
 
 .section .text
 
+.type wait_for_hart0, STT_FUNC
 wait_for_hart0:
 	# TODO
 	j halt
+.size wait_for_hart0, . - wait_for_hart0
-- 
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