Reorganization and rewiring.

1 files changed, 31 insertions, 0 deletions

diff --git a/fpga/src/HyperBus.bs b/fpga/src/HyperBus.bs
new file mode 100644
index 0000000..41d1703
--- /dev/null
+++ b/fpga/src/HyperBus.bs
@@ -0,0 +1,31 @@
+-- | A controller for a HyperBus interface, allowing for I/O to four chips.
+package HyperBus where
+
+import Clock
+
+-- | The HyperBus output pins.
+interface HyperBusOut =
+  ck       :: Bit 1
+  ck_n     :: Bit 1
+  cs0_n    :: Bit 1
+  cs1_n    :: Bit 1
+  cs2_n    :: Bit 1
+  cs3_n    :: Bit 1
+  reset_n  :: Bit 1
+  rwds_out :: Maybe (Bit 1)
+  dq_out   :: Maybe (Bit 8)
+
+mkHyperBus :: Wire (Bit 1) -> Wire (Bit 8) -> Clock -> Module HyperBusOut
+mkHyperBus rwds_in dq_in clock = module
+  interface HyperBusOut
+    ck = if clock.clk then 1 else 0
+    ck_n = if clock.clk then 0 else 1
+    cs0_n = 1
+    cs1_n = 1
+    cs2_n = 1
+    cs3_n = 1
+    reset_n = 1
+    rwds_out = Nothing
+    dq_out = Nothing
+
+-- vim: set ft=haskell :