Preparation to start using separate clock domains.

1 files changed, 28 insertions, 11 deletions

diff --git a/fpga/src/Numini.bs b/fpga/src/Numini.bs
index 58c2c38..39990fc 100644
--- a/fpga/src/Numini.bs
+++ b/fpga/src/Numini.bs
@@ -2,7 +2,8 @@
 -- the simulator's. This insulates us from Bluesim's lack of Inout support.
 package Numini where
 
-import Clock
+import Clocks
+import Connectable
 import HyperBus
 import Uart
 
@@ -32,22 +33,38 @@ interface NuminiOut =
   i2c_scl :: Bit 1
   i2c_sda_out :: Maybe (Bit 1)
 
-clockFreqHz :: Bit 24
+clockFreqHz :: Integer
 clockFreqHz = 12_000_000
 
 mkNumini :: Wire (Bit 1) -> Wire (Bit 1) -> Wire (Bit 1) -> Wire (Bit 1) ->
   Wire (Bit 8) -> Wire (Bit 1) -> Module NuminiOut
 mkNumini ch559_uart_rx inkplate_uart_rx usb_uart_rx hyperbus_rwds_in
          hyperbus_dq_in i2c_sda_in = module
-  clk9600 <- mkClock (clockFreqHz / 9600)
-  clk2M <- mkClock (clockFreqHz / 2_000_000)
-  clk3M <- mkClock (clockFreqHz / 3_000_000)
-
-  ch559_uart <- mkUart ch559_uart_rx clk9600
-  inkplate_uart <- mkUart inkplate_uart_rx clk2M
-  usb_uart <- mkUart usb_uart_rx clk9600
-
-  hyperbus <- mkHyperBus hyperbus_rwds_in hyperbus_dq_in clk3M
+  {-
+  -- Make derived clocks and resets.
+  clk9600 <- mkClockDivider (clockFreqHz / 9600)
+  clk2M <- mkClockDivider (clockFreqHz / 2_000_000)
+  clk3M <- mkClockDivider (clockFreqHz / 3_000_000)
+  reset9600 <- mkReset (clockFreqHz / 9600) True clk9600.slowClock
+  reset2M <- mkReset (clockFreqHz / 2_000_000) True clk2M.slowClock
+  reset3M <- mkReset (clockFreqHz / 3_000_000) True clk3M.slowClock
+
+  -- Make the peripherals.
+  ch559_uart <- changeSpecialWires (Just clk9600.slowClock)
+    (Just reset9600.new_rst) Nothing (mkUart ch559_uart_rx)
+  inkplate_uart <- changeSpecialWires (Just clk2M.slowClock)
+    (Just reset2M.new_rst) Nothing (mkUart inkplate_uart_rx)
+  usb_uart <- changeSpecialWires (Just clk9600.slowClock)
+    (Just reset9600.new_rst) Nothing (mkUart usb_uart_rx)
+  hyperbus <- changeSpecialWires (Just clk3M.slowClock)
+    (Just reset3M.new_rst) Nothing (mkHyperBus hyperbus_rwds_in hyperbus_dq_in)
+  -}
+  ch559_uart <- (mkUart ch559_uart_rx)
+  inkplate_uart <- (mkUart inkplate_uart_rx)
+  usb_uart <- (mkUart usb_uart_rx)
+  hyperbus <- (mkHyperBus hyperbus_rwds_in hyperbus_dq_in)
+
+  mkConnection usb_uart.send usb_uart.recv
 
   interface NuminiOut
     ch559_uart_tx = ch559_uart.tx