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| author | Nathan Ringo <nathan@remexre.com> | 2024-10-08 21:33:12 -0500 |
|---|---|---|
| committer | Nathan Ringo <nathan@remexre.com> | 2024-10-08 21:33:12 -0500 |
| commit | ddf01d51c3429c25a57077d93d3309ce0e5d2262 (patch) | |
| tree | ba8fa87bd190adfd02ff54092dbb57791bb7218e /fpga/src/TopSim.bs | |
| parent | 08d727e9886cde6a367906999e96a33f7ba37f33 (diff) | |
Preparation to start using separate clock domains.
Diffstat (limited to 'fpga/src/TopSim.bs')
| -rw-r--r-- | fpga/src/TopSim.bs | 44 |
1 files changed, 14 insertions, 30 deletions
diff --git a/fpga/src/TopSim.bs b/fpga/src/TopSim.bs index ca92fe1..bf5d59c 100644 --- a/fpga/src/TopSim.bs +++ b/fpga/src/TopSim.bs @@ -1,38 +1,22 @@ -- | The top-level module for simulation. package TopSim where -import Connectable -import CPU -import GetPut -import TriState -import Uart +import Numini mkTopSim :: Module Empty -mkTopSim = - module - cpu <- mkCPU +mkTopSim = module + ch559_uart_rx <- mkWire + inkplate_uart_rx <- mkWire + usb_uart_rx <- mkWire + hyperbus_rwds_in <- mkWire + hyperbus_dq_in <- mkWire + i2c_sda_in <- mkWire + numini <- mkNumini ch559_uart_rx inkplate_uart_rx usb_uart_rx + hyperbus_rwds_in hyperbus_dq_in i2c_sda_in - uart <- mkUart 1 - mkConnection cpu.uart_tx uart.send - mkConnection cpu.uart_rx uart.recv - - fakeUart <- mkUart 1 - rules - when True ==> uart.rxPin fakeUart.txPin - - timer :: Reg (Bit 8) <- mkReg 0 - rules - when True ==> timer := timer + 1 - when (timer == 0x00) ==> fakeUart.send.put 0x30 - when (timer == 0x01) ==> fakeUart.send.put 0x30 - when (timer == 0x02) ==> fakeUart.send.put 0x77 - when (timer == 0x03) ==> fakeUart.send.put 0x31 - when (timer == 0x04) ==> fakeUart.send.put 0x32 - when (timer == 0x05) ==> fakeUart.send.put 0x33 - when (timer == 0x06) ==> fakeUart.send.put 0x34 - when (timer == 0x10) ==> fakeUart.send.put 0x30 - when (timer == 0x11) ==> fakeUart.send.put 0x30 - when (timer == 0x12) ==> fakeUart.send.put 0x72 - when (timer == 0xff) ==> $finish + timer :: Reg (Bit 8) <- mkReg 0 + rules + when True ==> timer := timer + 1 + when (timer == 0xff) ==> $finish -- vim: set ft=haskell : |