diff options
author | Nathan Ringo <nathan@remexre.com> | 2024-09-20 08:47:45 -0500 |
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committer | Nathan Ringo <nathan@remexre.com> | 2024-09-20 08:47:45 -0500 |
commit | 762043c23a6d8025a84a36c374632d490fba35f9 (patch) | |
tree | 6b94eeb2f620ab725cde377ed3be0cd2294e109b /src/Top.bs | |
parent | d202daead0f05ecb60580fa7be2f23df8c4542fc (diff) |
Fiddling with the UART RX.
Diffstat (limited to 'src/Top.bs')
-rw-r--r-- | src/Top.bs | 26 |
1 files changed, 16 insertions, 10 deletions
@@ -32,27 +32,32 @@ mkTop :: Module Top mkTop = module bitState :: Reg (Bit 1) <- mkReg 0 + btn2State :: Reg (Bit 1) <- mkReg 0 + btn3State :: Reg (Bit 1) <- mkReg 0 uart <- mkUart (clockFreqHz / 9600) lastByte :: Reg (Bit 8) <- mkReg 0x21 - tick <- mkDivider (clockFreqHz) + tick <- mkDivider (clockFreqHz / 2) rules - "tick": when tick.clk ==> do - uart.send.put lastByte - "recv": when tick.clk ==> do + -- "tick": when tick.clk ==> do + -- uart.send.put lastByte + "debugPin": when True ==> bitState := uart.debugPin + "recv": when True ==> do byte <- uart.recv.get - lastByte := byte + -- lastByte := byte + uart.send.put byte + -- "inc": when tick.clk, btn2State == 1 ==> lastByte := lastByte + 1 + -- "dec": when tick.clk, btn3State == 1 ==> lastByte := lastByte - 1 interface Top -- RS232 rx bit = do - bitState := bit uart.rxPin bit tx = uart.txPin -- Onboard LEDs ledR_N = uart.txPin - ledG_N = uart.debugBit + ledG_N = bitState -- RGB LED driver ledRed_N = 1 ledGrn_N = 1 @@ -63,9 +68,10 @@ mkTop = led3 = 0 led4 = 0 led5 = 0 - btn1 _ = return () - btn2 _ = return () - btn3 _ = return () + btn1 1 = lastByte := 0x40 + btn1 0 = return () + btn2 b = btn2State := b + btn3 b = btn3State := b {-# verilog mkTop #-} {-# properties mkTop = { RSTN = BTN_N } #-} |