diff options
| author | Nathan Ringo <nathan@remexre.com> | 2024-09-20 10:03:49 -0500 |
|---|---|---|
| committer | Nathan Ringo <nathan@remexre.com> | 2024-09-20 10:03:49 -0500 |
| commit | eaa9e67b9540bebe980503027d4aa7e6dfd1bf31 (patch) | |
| tree | 1b35ded1fb59ab02b3835b66598646fba5caa5af /src/TopSim.bs | |
| parent | 762043c23a6d8025a84a36c374632d490fba35f9 (diff) | |
Fixed UART.
Diffstat (limited to 'src/TopSim.bs')
| -rw-r--r-- | src/TopSim.bs | 11 |
1 files changed, 9 insertions, 2 deletions
diff --git a/src/TopSim.bs b/src/TopSim.bs index 0b77d3b..a4f1967 100644 --- a/src/TopSim.bs +++ b/src/TopSim.bs @@ -8,13 +8,20 @@ mkTopSim :: Module Empty mkTopSim = module timer :: Reg (Bit 8) <- mkReg 0 + next :: Reg (Bit 8) <- mkReg 0 + saved :: Reg (Bit 8) <- mkReg 0x6a uart <- mkUart 1 rules when True ==> timer := timer + 1 - when True ==> uart.rxPin (1 - uart.txPin) - when (timer == 0x00) ==> uart.send.put 0x6a + when True ==> uart.rxPin uart.txPin + when True ==> do + b <- uart.recv.get + next := timer + 5 + saved := b + when (timer == next) ==> do + uart.send.put saved when (timer == 0x40) ==> $finish -- vim: set ft=haskell : |