Fix the UART TX.

1 files changed, 6 insertions, 8 deletions

diff --git a/src/Uart.bs b/src/Uart.bs
index f66970c..d79f246 100644
--- a/src/Uart.bs
+++ b/src/Uart.bs
@@ -32,10 +32,9 @@ data TxState
     Start (Bit 8)
   | -- | The UART is about to send a data bit. 'Data b n' transitions to
     -- 'Data (b >> 1) (n - 1)' by sending a data bit. 'Data b 0' transitions to
-    -- 'Stop' by sending the last data bit.
+    -- 'Idle' by sending the last data bit. Being in the 'Idle' state for a
+    -- clock transmits the stop bit.
     Data (Bit 8) (Bit 3)
-  | -- | The UART is about to send the stop bit. Transitions to 'Idle'.
-    Stop
   deriving (Bits)
 
 -- | The TX side of the UART.
@@ -55,7 +54,9 @@ mkTxUart baudClock bufferSize =
     rules
       "uart_tx": when baudClock.clk
         rules
-          "uart_tx_idle": when Idle <- state ==> do
+          "uart_tx_idle": when Idle <- state, not fifo.notEmpty ==> do
+            pin := 1
+          "uart_tx_idle_to_start": when Idle <- state, fifo.notEmpty ==> do
             pin := 1
             b <- (toGet fifo).get
             state := Start b
@@ -65,12 +66,9 @@ mkTxUart baudClock bufferSize =
           "uart_tx_data": when Data b n <- state ==> do
             pin := b[0:0]
             if n == 0 then
-              state := Stop
+              state := Idle
             else
               state := Data (b >> 1) (n - 1)
-          "uart_tx_stop": when Stop <- state ==> do
-            pin := 1
-            state := Idle
     interface TxUart
       pin = pin
       send = toPut fifo