diff options
Diffstat (limited to 'fpga/src/TopSim.bs')
| -rw-r--r-- | fpga/src/TopSim.bs | 27 |
1 files changed, 16 insertions, 11 deletions
diff --git a/fpga/src/TopSim.bs b/fpga/src/TopSim.bs index add8b54..322ffb2 100644 --- a/fpga/src/TopSim.bs +++ b/fpga/src/TopSim.bs @@ -1,7 +1,7 @@ -- | The top-level module for simulation. package TopSim where -import Numini +-- import Numini import GetPut import I2C @@ -23,23 +23,28 @@ mkTopSim = module i2c_scl <- mkReg 0 i2c_sda <- mkReg 0 -- i2c <- mkDividedI2C (12_000_000 / 200_000) 1 1 - i2c <- mkDividedI2C 2 1 1 + -- i2c <- mkDividedI2C 2 1 1 + i2c <- mkI2C 1 1 rules when True ==> i2c_scl := i2c.txSCL when True ==> i2c_sda := i2c.txSDA timer :: Reg (Bit 16) <- mkReg 0 rules - when (timer == 0) ==> i2c.send.put (Write 0x20 0x00) - when (timer == 1) ==> i2c.send.put (Write 0x20 0x00) - when (timer == 2) ==> i2c.send.put (Write 0x20 0x00) - when (timer == 3) ==> i2c.send.put (Write 0x20 0x12) - when (timer == 4) ==> i2c.send.put (Write 0x20 0xaa) - when (timer == 5) ==> i2c.send.put (Write 0x20 0x55) - when True ==> timer := timer + 1 - when (timer == 0x1fff) ==> $finish - when True ==> do + {- + "t0": when (timer == 0) ==> i2c.send.put (Write 0x20 0x00) + "t1": when (timer == 1) ==> i2c.send.put (Write 0x20 0x00) + "t2": when (timer == 2) ==> i2c.send.put (Write 0x20 0x00) + "t3": when (timer == 3) ==> i2c.send.put (Write 0x20 0x12) + "t4": when (timer == 4) ==> i2c.send.put (Write 0x20 0xaa) + "t5": when (timer == 5) ==> i2c.send.put (Write 0x20 0x55) + -} + "advance timer": when True ==> timer := timer + 1 + "finish": when (timer == 0x1fff) ==> $finish + {- + "log received values": when True ==> do result <- i2c.recv.get $display "recv: " (fshow result) + -} -- vim: set ft=haskell : |