blob: add8b54dc2b5512fa708058c9ab1af60fb4524e4 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
|
-- | The top-level module for simulation.
package TopSim where
import Numini
import GetPut
import I2C
mkTopSim :: Module Empty
mkTopSim = module
{-
ch559_uart_rx <- mkWire
inkplate_uart_rx <- mkWire
usb_uart_rx <- mkWire
hyperbus_rwds_in <- mkWire
hyperbus_dq_in <- mkWire
i2c_scl_in <- mkWire
i2c_sda_in <- mkWire
numini <- mkNumini ch559_uart_rx inkplate_uart_rx usb_uart_rx
hyperbus_rwds_in hyperbus_dq_in i2c_scl_in i2c_sda_in
-}
i2c_scl <- mkReg 0
i2c_sda <- mkReg 0
-- i2c <- mkDividedI2C (12_000_000 / 200_000) 1 1
i2c <- mkDividedI2C 2 1 1
rules
when True ==> i2c_scl := i2c.txSCL
when True ==> i2c_sda := i2c.txSDA
timer :: Reg (Bit 16) <- mkReg 0
rules
when (timer == 0) ==> i2c.send.put (Write 0x20 0x00)
when (timer == 1) ==> i2c.send.put (Write 0x20 0x00)
when (timer == 2) ==> i2c.send.put (Write 0x20 0x00)
when (timer == 3) ==> i2c.send.put (Write 0x20 0x12)
when (timer == 4) ==> i2c.send.put (Write 0x20 0xaa)
when (timer == 5) ==> i2c.send.put (Write 0x20 0x55)
when True ==> timer := timer + 1
when (timer == 0x1fff) ==> $finish
when True ==> do
result <- i2c.recv.get
$display "recv: " (fshow result)
-- vim: set ft=haskell :
|
