diff options
Diffstat (limited to 'fpga')
| -rw-r--r-- | fpga/Makefile | 7 | ||||
| -rw-r--r-- | fpga/default.nix | 3 | ||||
| -rw-r--r-- | fpga/src/Top.bs | 52 | ||||
| -rw-r--r-- | fpga/src/icebreaker.pcf | 18 |
4 files changed, 52 insertions, 28 deletions
diff --git a/fpga/Makefile b/fpga/Makefile index edbb7d1..24e8ace 100644 --- a/fpga/Makefile +++ b/fpga/Makefile @@ -1,6 +1,6 @@ BSC_COMP_FLAGS = -bdir tmp -p src:+ -simdir tmp -vdir tmp BSC_LINK_FLAGS = -bdir tmp -simdir tmp -vdir tmp -BSC_SOURCES = BRAM2.v FIFO1.v FIFO10.v RevertReg.v SizedFIFO.v +BSC_SOURCES = BRAM2.v FIFO1.v FIFO10.v RevertReg.v SizedFIFO.v TriState.v all: tmp/mkTop.bin flash: tmp/mkTop.bin @@ -15,8 +15,11 @@ tmp/%.asc tmp/%-report.json: tmp/%.json src/icebreaker.pcf nextpnr-ice40 -ql tmp/$*.nplog --up5k --package sg48 --freq 12 \ --asc $@ --report tmp/$*-report.json \ --pcf src/icebreaker.pcf --json $< -tmp/mkTop.json: tmp/mkTop.v $(addprefix $(BSC)/lib/Verilog/,$(BSC_SOURCES)) +tmp/mkTop.json: tmp/mkTop.rewritten.v $(addprefix $(BSC)/lib/Verilog/,$(BSC_SOURCES)) yosys -ql tmp/mkTop.yslog -p 'synth_ice40 -top mkTop -json $@' $^ +tmp/mkTop.rewritten.v: tmp/mkTop.v + cp $< $@ + perl $(BSC_SRC)/util/scripts/basicinout.pl $@ tmp/mkTop.v: @mkdir -p $(dir $@) bsc -u -verilog -g mkTop $(BSC_COMP_FLAGS) src/Top.bs diff --git a/fpga/default.nix b/fpga/default.nix index ad4d4b4..7e07d7b 100644 --- a/fpga/default.nix +++ b/fpga/default.nix @@ -2,6 +2,7 @@ bluespec, icestorm, nextpnr, + perl, yosys, stdenv, }: @@ -14,11 +15,13 @@ stdenv.mkDerivation { bluespec icestorm nextpnr + perl yosys ]; configurePhase = '' runHook preConfigure export BSC=${bluespec} + export BSC_SRC=${bluespec.src} runHook postConfigure ''; buildFlags = [ diff --git a/fpga/src/Top.bs b/fpga/src/Top.bs index 924b19a..7740c4b 100644 --- a/fpga/src/Top.bs +++ b/fpga/src/Top.bs @@ -4,6 +4,7 @@ package Top where import Connectable import CPU import GetPut +import TriState import Uart -- | The interface to the iCEBreaker. @@ -28,24 +29,23 @@ interface Top = hyperBus_RESET_N :: Bit 1 {-# always_ready, result = P1A9 #-} hyperBus_RWDS :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [P1A10] #-} -- HyperBus 2 (PMOD 1B) - -- hyperBus_DQ0_i :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [P1B1] #-} - -- hyperBus_DQ0 :: Inout (Bit 1) {-# always_ready, result = P1B1 #-} - -- hyperBus_DQ1 :: Bit 1 {-# always_ready, result = P1B2 #-} - -- hyperBus_DQ2 :: Bit 1 {-# always_ready, result = P1B3 #-} - -- hyperBus_DQ3 :: Bit 1 {-# always_ready, result = P1B4 #-} - -- hyperBus_DQ7 :: Bit 1 {-# always_ready, result = P1B7 #-} - -- hyperBus_DQ6 :: Bit 1 {-# always_ready, result = P1B8 #-} - -- hyperBus_DQ5 :: Bit 1 {-# always_ready, result = P1B9 #-} - -- hyperBus_DQ4 :: Bit 1 {-# always_ready, result = P1B10 #-} + hyperBus_DQ0 :: Inout (Bit 1) {-# prefix = "P1B1" #-} + hyperBus_DQ1 :: Inout (Bit 1) {-# prefix = "P1B2" #-} + hyperBus_DQ2 :: Inout (Bit 1) {-# prefix = "P1B3" #-} + hyperBus_DQ3 :: Inout (Bit 1) {-# prefix = "P1B4" #-} + hyperBus_DQ7 :: Inout (Bit 1) {-# prefix = "P1B7" #-} + hyperBus_DQ6 :: Inout (Bit 1) {-# prefix = "P1B8" #-} + hyperBus_DQ5 :: Inout (Bit 1) {-# prefix = "P1B9" #-} + hyperBus_DQ4 :: Inout (Bit 1) {-# prefix = "P1B10" #-} -- LEDs and buttons (PMOD 2) - led1 :: Bit 1 {-# always_ready, result = LED1 #-} - led2 :: Bit 1 {-# always_ready, result = LED2 #-} - led3 :: Bit 1 {-# always_ready, result = LED3 #-} - led4 :: Bit 1 {-# always_ready, result = LED4 #-} - led5 :: Bit 1 {-# always_ready, result = LED5 #-} - btn1 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [BTN1] #-} - btn2 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [BTN2] #-} - btn3 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [BTN3] #-} + led1 :: Bit 1 {-# always_ready, result = P2_7 #-} + led2 :: Bit 1 {-# always_ready, result = P2_1 #-} + led3 :: Bit 1 {-# always_ready, result = P2_2 #-} + led4 :: Bit 1 {-# always_ready, result = P2_8 #-} + led5 :: Bit 1 {-# always_ready, result = P2_3 #-} + btn1 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [P2_9] #-} + btn2 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [P2_4] #-} + btn3 :: Bit 1 -> Action {-# always_enabled, always_ready, prefix = "", arg_names = [P2_10] #-} clockFreqHz :: Integer clockFreqHz = 12_000_000 @@ -59,6 +59,15 @@ mkTop = mkConnection cpu.uart_tx uart.send mkConnection cpu.uart_rx uart.recv + hyperBus_data0 <- mkTriState True 1 + hyperBus_data1 <- mkTriState True 1 + hyperBus_data2 <- mkTriState True 1 + hyperBus_data3 <- mkTriState True 1 + hyperBus_data4 <- mkTriState True 1 + hyperBus_data5 <- mkTriState True 1 + hyperBus_data6 <- mkTriState True 1 + hyperBus_data7 <- mkTriState True 1 + interface Top -- RS232 rx = uart.rxPin @@ -79,6 +88,15 @@ mkTop = hyperBus_CS1_N = 1 hyperBus_RESET_N = 1 hyperBus_RWDS _ = noAction + -- HyperBus 2 (PMOD 1B) + hyperBus_DQ0 = hyperBus_data0.io + hyperBus_DQ1 = hyperBus_data1.io + hyperBus_DQ2 = hyperBus_data2.io + hyperBus_DQ3 = hyperBus_data3.io + hyperBus_DQ4 = hyperBus_data4.io + hyperBus_DQ5 = hyperBus_data5.io + hyperBus_DQ6 = hyperBus_data6.io + hyperBus_DQ7 = hyperBus_data7.io -- LEDs and buttons (PMOD 2) led1 = 0 led2 = 0 diff --git a/fpga/src/icebreaker.pcf b/fpga/src/icebreaker.pcf index 1164c98..ccfcebf 100644 --- a/fpga/src/icebreaker.pcf +++ b/fpga/src/icebreaker.pcf @@ -43,12 +43,12 @@ set_io -nowarn P1B8 36 set_io -nowarn P1B9 32 set_io -nowarn P1B10 28 -# LEDs and Buttons (PMOD 2) -set_io -nowarn LED1 26 -set_io -nowarn LED2 27 -set_io -nowarn LED3 25 -set_io -nowarn LED4 23 -set_io -nowarn LED5 21 -set_io -nowarn BTN1 20 -set_io -nowarn BTN2 19 -set_io -nowarn BTN3 18 +# PMOD 2 +set_io -nowarn P2_1 27 +set_io -nowarn P2_2 25 +set_io -nowarn P2_3 21 +set_io -nowarn P2_4 19 +set_io -nowarn P2_7 26 +set_io -nowarn P2_8 23 +set_io -nowarn P2_9 20 +set_io -nowarn P2_10 18 |