diff options
Diffstat (limited to 'src/Top.bs')
-rw-r--r-- | src/Top.bs | 25 |
1 files changed, 5 insertions, 20 deletions
@@ -31,33 +31,19 @@ clockFreqHz = 12_000_000 mkTop :: Module Top mkTop = module - bitState :: Reg (Bit 1) <- mkReg 0 - btn2State :: Reg (Bit 1) <- mkReg 0 - btn3State :: Reg (Bit 1) <- mkReg 0 - uart <- mkUart (clockFreqHz / 9600) - - lastByte :: Reg (Bit 8) <- mkReg 0x21 - tick <- mkDivider (clockFreqHz / 2) rules - -- "tick": when tick.clk ==> do - -- uart.send.put lastByte - "debugPin": when True ==> bitState := uart.debugPin "recv": when True ==> do byte <- uart.recv.get - -- lastByte := byte uart.send.put byte - -- "inc": when tick.clk, btn2State == 1 ==> lastByte := lastByte + 1 - -- "dec": when tick.clk, btn3State == 1 ==> lastByte := lastByte - 1 interface Top -- RS232 - rx bit = do - uart.rxPin bit + rx = uart.rxPin tx = uart.txPin -- Onboard LEDs ledR_N = uart.txPin - ledG_N = bitState + ledG_N = 1 -- RGB LED driver ledRed_N = 1 ledGrn_N = 1 @@ -68,10 +54,9 @@ mkTop = led3 = 0 led4 = 0 led5 = 0 - btn1 1 = lastByte := 0x40 - btn1 0 = return () - btn2 b = btn2State := b - btn3 b = btn3State := b + btn1 _ = return () + btn2 _ = return () + btn3 _ = return () {-# verilog mkTop #-} {-# properties mkTop = { RSTN = BTN_N } #-} |