| Age | Commit message (Expand) | Author |
|---|---|---|
| 2024-10-24 | Single writes working? | Nathan Ringo |
| 2024-10-24 | ... | Nathan Ringo |
| 2024-10-24 | Completed read? | Nathan Ringo |
| 2024-10-24 | rename bit | Nathan Ringo |
| 2024-10-23 | like 1/3 of an i2c ctrler | Nathan Ringo |
| 2024-10-23 | Start of an I²C rewrite... again... | Nathan Ringo |
| 2024-10-23 | checkpoint; something is broken with timing | Nathan Ringo |
| 2024-10-20 | Maybe repaired UART, I2C, and HyperBus (but now getting a weird error)... | Nathan Ringo |
| 2024-10-08 | Preparation to start using separate clock domains. | Nathan Ringo |
| 2024-10-08 | Reorganization and rewiring. | Nathan Ringo |
| 2024-10-08 | Split the simulator back out to its own package. | Nathan Ringo |
| 2024-10-05 | Start of the CH559 code, adds a NixOS module for udev rules for the boards. | Nathan Ringo |
| 2024-10-02 | Adds tristates for HyperBus. | Nathan Ringo |
| 2024-09-24 | Fix echo. | Nathan Ringo |
| 2024-09-24 | Another reorg. | Nathan Ringo |
| 2024-09-23 | Adds README, moves fpga stuff to a subdirectory. | Nathan Ringo |
 |
index : numini | |
| A toy CPU. | Nathan Ringo |
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