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-rw-r--r--Makefile3
1 files changed, 2 insertions, 1 deletions
diff --git a/Makefile b/Makefile
index 5157357..269cf32 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,7 @@
BSC_COMP_FLAGS = -aggressive-conditions -bdir tmp -check-assert -keep-fires \
-p src:+ -vdir tmp
BSC_LINK_FLAGS = -keep-fires
+BSC_SOURCES = FIFO1.v
TOPFILE = Top
TOPMODULE = mkTop
SRCS = $(shell find src -name '*.bs')
@@ -21,7 +22,7 @@ tmp/%.bin: tmp/%.asc
tmp/%.asc: tmp/%.json src/icebreaker.pcf
nextpnr-ice40 -ql tmp/$*.nplog --up5k --package sg48 --freq 12 \
--asc $@ --pcf src/icebreaker.pcf --json $<
-tmp/$(TOPMODULE).json: tmp/$(TOPMODULE).v
+tmp/$(TOPMODULE).json: tmp/$(TOPMODULE).v $(addprefix $(BSC)/lib/Verilog/,$(BSC_SOURCES))
yosys -ql tmp/$(TOPMODULE).yslog -p 'synth_ice40 -top mkTop -json $@' $^
tmp/$(TOPMODULE).v: tmp/$(TOPFILE).bo
bsc -g $(TOPMODULE) -verilog $(BSC_COMP_FLAGS) src/$(TOPFILE).bs