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authorNathan Ringo <nathan@remexre.com>2024-09-23 14:15:37 -0500
committerNathan Ringo <nathan@remexre.com>2024-09-23 14:15:37 -0500
commit0f80a1960037ba1a7a4835f57ca100d5caf8d8ef (patch)
tree1cd75bab8db3366919f586117d09a6a07087d488 /src/TopSim.bs
parenteaa9e67b9540bebe980503027d4aa7e6dfd1bf31 (diff)
Start of an application.
Diffstat (limited to 'src/TopSim.bs')
-rw-r--r--src/TopSim.bs17
1 files changed, 7 insertions, 10 deletions
diff --git a/src/TopSim.bs b/src/TopSim.bs
index a4f1967..0db5c10 100644
--- a/src/TopSim.bs
+++ b/src/TopSim.bs
@@ -1,27 +1,24 @@
package TopSim where
+import App
import GetPut
-import Top
import Uart
mkTopSim :: Module Empty
mkTopSim =
module
timer :: Reg (Bit 8) <- mkReg 0
- next :: Reg (Bit 8) <- mkReg 0
- saved :: Reg (Bit 8) <- mkReg 0x6a
uart <- mkUart 1
+ app <- mkApp uart.recv uart.send
+
+ fakeUart <- mkUart 1
rules
when True ==> timer := timer + 1
- when True ==> uart.rxPin uart.txPin
- when True ==> do
- b <- uart.recv.get
- next := timer + 5
- saved := b
- when (timer == next) ==> do
- uart.send.put saved
+ when True ==> uart.rxPin fakeUart.txPin
+ when (timer == 0x00) ==> fakeUart.send.put 0x30
+ when (timer == 0x01) ==> fakeUart.send.put 0x31
when (timer == 0x40) ==> $finish
-- vim: set ft=haskell :