| Age | Commit message (Collapse) | Author | |
|---|---|---|---|
| 2024-10-05 | Add mention of the usbkbd/ dir in the README. | Nathan Ringo | |
| 2024-10-05 | Improve clean script. | Nathan Ringo | |
| 2024-10-02 | Adds tristates for HyperBus. | Nathan Ringo | |
| This might need to be remodularized; Bluesim doesn't support Inouts, so this fails to build there for now. It probably makes sense to split out the board to its own package, then go back to having Top and TopSim packages, where only Top wires it up to Tristates. | |||
| 2024-09-24 | Fix echo. | Nathan Ringo | |
| 2024-09-24 | Another reorg. | Nathan Ringo | |
| 2024-09-23 | Adds README, moves fpga stuff to a subdirectory. | Nathan Ringo | |
| 2024-09-23 | Produce timing reports from nextpnr. | Nathan Ringo | |
| 2024-09-23 | Gets RAM working. | Nathan Ringo | |
| 2024-09-23 | Start of an application. | Nathan Ringo | |
| 2024-09-20 | Fixed UART. | Nathan Ringo | |
| 2024-09-20 | Fiddling with the UART RX. | Nathan Ringo | |
| 2024-09-18 | Fix the UART TX. | Nathan Ringo | |
| 2024-09-18 | Add the simulator. | Nathan Ringo | |
| 2024-05-06 | tweak debug, why is it always enqueueing a zero... | Nathan Ringo | |
| 2024-05-06 | refactor, but now the timing fails again... | Nathan Ringo | |
| 2024-05-06 | ... | Nathan Ringo | |
| 2024-05-06 | Attempt at RX, but it doesn't yet work... | Nathan Ringo | |
| 2024-05-06 | Sending side done! | Nathan Ringo | |
| 2024-05-05 | triyng a uart from scratch... not yet working... | Nathan Ringo | |
| 2024-05-05 | Not yet working UART... | Nathan Ringo | |
| 2024-05-05 | Initial commit | Nathan Ringo | |
 |
index : numini | |
| A toy CPU. | Nathan Ringo |
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